Developing avionics systems and hardware with high performance and functionality

New avionics systems and hardware developed by ESA through Technology Research Programme (TRP) activities offer high performance and functionality making use of novel architecture, components and fabrication processes. Those activities are coordinated through the Space Avionics Open Interface Architecture (SAVOIR) initiative with a strong support from major stakeholders. For instance, Astrium France’s Spacecraft Controller On a Chip combines all spacecraft computer elements on a single chip, embedding SpaceWire. Sweden-based Aeroflex Gaisler’s LEON family of microprocessors is highly configurable, supporting system-on-chip applications. The LEON FT-3 incorporates single event upset detection and correction. It is currently being exported to US customers. ESA is also working with ST Microelectronics in France on future 65 nm scale chip fabrication (see ECI-TnD section). Reducing the footprint of chips in turn cuts the mass, power and size of their electronic boards, making a significant contribution to European competitiveness.